implement pseudo min/max simd operations

This commit is contained in:
Ilya Rezvov
2023-09-24 19:52:09 -06:00
parent 902819aee7
commit 3d77f80484
4 changed files with 34 additions and 2 deletions
+24
View File
@@ -162,6 +162,16 @@ zeroAwareMax a b
| isNaN b = b
| otherwise = maxNum a b
nanAwareMin :: IEEE a => a -> a -> a
nanAwareMin a b
| isNaN a = a
| otherwise = minNum a b
nanAwareMax :: IEEE a => a -> a -> a
nanAwareMax a b
| isNaN a = a
| otherwise = maxNum a b
floatFloor :: Float -> Float
floatFloor a
| isNaN a = a
@@ -1932,6 +1942,20 @@ eval budget store inst FunctionInstance { funcType, moduleInstance, code = Funct
_ -> error "impossible due to validation"
in
return $ Done ctx { stack = VV128 r : rest }
step ctx@EvalCtx{ stack = (VV128 v2:VV128 v1:rest) } (FBinOp (BS128 shape) FPMin) =
let r = case shape of
F32x4 -> lanewise @Word32 shape v1 v2 $ \a b -> floatToWord $ nanAwareMin (wordToFloat a) (wordToFloat b)
F64x2 -> lanewise @Word64 shape v1 v2 $ \a b -> doubleToWord $ nanAwareMin (wordToDouble a) (wordToDouble b)
_ -> error "impossible due to validation"
in
return $ Done ctx { stack = VV128 r : rest }
step ctx@EvalCtx{ stack = (VV128 v2:VV128 v1:rest) } (FBinOp (BS128 shape) FPMax) =
let r = case shape of
F32x4 -> lanewise @Word32 shape v1 v2 $ \a b -> floatToWord $ nanAwareMax (wordToFloat a) (wordToFloat b)
F64x2 -> lanewise @Word64 shape v1 v2 $ \a b -> doubleToWord $ nanAwareMax (wordToDouble a) (wordToDouble b)
_ -> error "impossible due to validation"
in
return $ Done ctx { stack = VV128 r : rest }
step ctx@EvalCtx{ stack = (VF32 v2:VF32 v1:rest) } (FRelOp BS32 FEq) =
return $ Done ctx { stack = VI32 (if v1 == v2 then 1 else 0) : rest }
step ctx@EvalCtx{ stack = (VF32 v2:VF32 v1:rest) } (FRelOp BS32 FNe) =