parse shuffle and replace_lane

This commit is contained in:
Ilya Rezvov
2023-09-05 22:38:47 -06:00
parent b4acb0e1e8
commit 4302e4b32f
5 changed files with 119 additions and 21 deletions
+51
View File
@@ -352,6 +352,7 @@ import Language.Wasm.Lexer (
'start' { Lexeme _ (TKeyword "start") }
'module' { Lexeme _ (TKeyword "module") }
-- simd
'i8x16.shuffle' { Lexeme _ (TKeyword "i8x16.shuffle") }
'i8x16.swizzle' { Lexeme _ (TKeyword "i8x16.swizzle") }
'i8x16.splat' { Lexeme _ (TKeyword "i8x16.splat") }
'i16x8.splat' { Lexeme _ (TKeyword "i16x8.splat") }
@@ -367,8 +368,27 @@ import Language.Wasm.Lexer (
'i64x2.extract_lane' { Lexeme _ (TKeyword "i64x2.extract_lane") }
'f32x4.extract_lane' { Lexeme _ (TKeyword "f32x4.extract_lane") }
'f64x2.extract_lane' { Lexeme _ (TKeyword "f64x2.extract_lane") }
'i8x16.replace_lane' { Lexeme _ (TKeyword "i8x16.replace_lane") }
'i16x8.replace_lane' { Lexeme _ (TKeyword "i16x8.replace_lane") }
'i32x4.replace_lane' { Lexeme _ (TKeyword "i32x4.replace_lane") }
'i64x2.replace_lane' { Lexeme _ (TKeyword "i64x2.replace_lane") }
'f32x4.replace_lane' { Lexeme _ (TKeyword "f32x4.replace_lane") }
'f64x2.replace_lane' { Lexeme _ (TKeyword "f64x2.replace_lane") }
'i8x16.all_true' { Lexeme _ (TKeyword "i8x16.all_true") }
'i16x8.all_true' { Lexeme _ (TKeyword "i16x8.all_true") }
'i32x4.all_true' { Lexeme _ (TKeyword "i32x4.all_true") }
'i64x2.all_true' { Lexeme _ (TKeyword "i64x2.all_true") }
'f32x4.all_true' { Lexeme _ (TKeyword "f32x4.all_true") }
'f64x2.all_true' { Lexeme _ (TKeyword "f64x2.all_true") }
'v128.any_true' { Lexeme _ (TKeyword "v128.any_true") }
'i8x16.add' { Lexeme _ (TKeyword "i8x16.add") }
'i16x8.add' { Lexeme _ (TKeyword "i16x8.add") }
'i32x4.add' { Lexeme _ (TKeyword "i32x4.add") }
'i64x2.add' { Lexeme _ (TKeyword "i64x2.add") }
'i8x16.sub' { Lexeme _ (TKeyword "i8x16.sub") }
'i16x8.sub' { Lexeme _ (TKeyword "i16x8.sub") }
'i32x4.sub' { Lexeme _ (TKeyword "i32x4.sub") }
'i64x2.sub' { Lexeme _ (TKeyword "i64x2.sub") }
-- script extension
'binary' { Lexeme _ (TKeyword "binary") }
'quote' { Lexeme _ (TKeyword "quote") }
@@ -713,13 +733,24 @@ plaininstr :: { PlainInstr }
| 'f32.reinterpret_i32' { FReinterpretI BS32 }
| 'f64.reinterpret_i64' { FReinterpretI BS64 }
-- simd
| 'i8x16.shuffle' i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 i8 {
I8x16Shuffle $ map fromIntegral
[$2, $3, $4, $5, $6, $7, $8, $9, $10, $11, $12, $13, $14, $15, $16, $17]
}
| 'i8x16.swizzle' { I8x16Swizzle }
| 'v128.any_true' { V128AnyTrue }
| 'i8x16.splat' { V128Splat I8x16 }
| 'i16x8.splat' { V128Splat I16x8 }
| 'i32x4.splat' { V128Splat I32x4 }
| 'i64x2.splat' { V128Splat I64x2 }
| 'f32x4.splat' { V128Splat F32x4 }
| 'f64x2.splat' { V128Splat F64x2 }
| 'i8x16.all_true' { V128AllTrue I8x16 }
| 'i16x8.all_true' { V128AllTrue I16x8 }
| 'i32x4.all_true' { V128AllTrue I32x4 }
| 'i64x2.all_true' { V128AllTrue I64x2 }
| 'f32x4.all_true' { V128AllTrue F32x4 }
| 'f64x2.all_true' { V128AllTrue F64x2 }
| 'i8x16.extract_lane_s' u32 { V128ExtractLane I8x16 $2 True }
| 'i16x8.extract_lane_s' u32 { V128ExtractLane I16x8 $2 True }
| 'i8x16.extract_lane_u' u32 { V128ExtractLane I8x16 $2 False }
@@ -728,8 +759,20 @@ plaininstr :: { PlainInstr }
| 'i64x2.extract_lane' u32 { V128ExtractLane I64x2 $2 False }
| 'f32x4.extract_lane' u32 { V128ExtractLane F32x4 $2 False }
| 'f64x2.extract_lane' u32 { V128ExtractLane F64x2 $2 False }
| 'i8x16.replace_lane' u32 { V128ReplaceLane I8x16 $2 }
| 'i16x8.replace_lane' u32 { V128ReplaceLane I16x8 $2 }
| 'i32x4.replace_lane' u32 { V128ReplaceLane I32x4 $2 }
| 'i64x2.replace_lane' u32 { V128ReplaceLane I64x2 $2 }
| 'f32x4.replace_lane' u32 { V128ReplaceLane F32x4 $2 }
| 'f64x2.replace_lane' u32 { V128ReplaceLane F64x2 $2 }
| 'i8x16.add' { IBinOp (BS128 I8x16) IAdd }
| 'i16x8.add' { IBinOp (BS128 I16x8) IAdd }
| 'i32x4.add' { IBinOp (BS128 I32x4) IAdd }
| 'i64x2.add' { IBinOp (BS128 I64x2) IAdd }
| 'i8x16.sub' { IBinOp (BS128 I8x16) ISub }
| 'i16x8.sub' { IBinOp (BS128 I16x8) ISub }
| 'i32x4.sub' { IBinOp (BS128 I32x4) ISub }
| 'i64x2.sub' { IBinOp (BS128 I64x2) ISub }
typeuse(next)
: '(' typeuse1(folded_instr_list(next), instruction_list(next)) {
@@ -1433,6 +1476,10 @@ data PlainInstr =
-- Vector instructions
| V128Splat SimdShape
| V128ExtractLane SimdShape Natural Bool
| V128ReplaceLane SimdShape Natural
| V128AllTrue SimdShape
| V128AnyTrue
| I8x16Shuffle [Int]
| I8x16Swizzle
deriving (Show, Eq)
@@ -1989,6 +2036,10 @@ desugarize fields = do
synInstrToStruct _ (PlainInstr (FReinterpretI sz)) = return $ S.FReinterpretI sz
synInstrToStruct _ (PlainInstr (V128Splat shape)) = return $ S.V128Splat shape
synInstrToStruct _ (PlainInstr (V128ExtractLane shape idx sign)) = return $ S.V128ExtractLane shape idx sign
synInstrToStruct _ (PlainInstr (V128ReplaceLane shape idx)) = return $ S.V128ReplaceLane shape idx
synInstrToStruct _ (PlainInstr (V128AllTrue shape)) = return $ S.V128AllTrue shape
synInstrToStruct _ (PlainInstr V128AnyTrue) = return $ S.V128AnyTrue
synInstrToStruct _ (PlainInstr (I8x16Shuffle idxs)) = return $ S.I8x16Shuffle idxs
synInstrToStruct _ (PlainInstr I8x16Swizzle) = return $ S.I8x16Swizzle
synInstrToStruct ctx@FunCtx { ctxMod = Module { types } } BlockInstr {label, blockType, body} = do
let ctx' = ctx { ctxLabels = label : ctxLabels ctx }